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2013 HPC Advisory Council Switzerland Conference

Thursday, January 3rd, 2013

It was 2010 when Hussein Harake (CSCS), Brian Sparks (HPC Advisory Council) and Gilad Shainer (Chairman of the HPC Advisory Council)  organized the  first HPC Advisory Council conference in Lugano.  Almost four years passed and  Brian, Gilad and Hussein are more enthusiast and determined than ever to make the 2013 HPC Advisory Council Switzerland Conference an exciting event not to miss.  Here they are inviting you to participate in the 4th HPC Advisory Council Swiss Conference to be held in Lugano, Switzerland, on 13-15 March 2013 .

The agenda was shaped by a poll of the attendees of the last three years’ HPC Advisory Council meetings. Topics will certainly include interconnects, storage, accelerators, MPI, big data and more.

For more information see http://www.hpcadvisorycouncil.com

You should not miss the “Making of …” trailer, it will not only make you smile but it shows how Hussein, Brian and Gilad really enjoy their collaboration and do no miss any opportunity to have some fun.

 

III: The 2012 PRACE Summer School on Code Optimization for Multi-core and Intel MIC at CSCS

Friday, December 21st, 2012

The Swiss National Supercomputing Centre (CSCS) in Lugano, Switzerland hosted the 2012 PRACE Summer School on Code Optimisation for Multi-Core and Intel MIC Architectures.

The Workshop on Intel Many Integrated Core is completing the series of posts on the PRACE Summer School.

Introduction to Workshop on Intel Many Integrated Core

by Jim Jeffers (Intel)

Intel MIC Architecture – Intel MIC HW/SW Architecture

by Jim Jeffers (Intel)

Intel MIC Architecture Parallel Programming Tools

by James Reinders (Intel)

Intel MIC Architecture – Getting Started with Intel MIC Coding-Debug

by Michael Klemm (Intel)

Intel MIC Architecture – Memory Usage and Considerations

by Michael Klemm (Intel)

Intel MIC Architecture – Intel MIC User Experiences – Part 1/2

by Tommy Minyard (TACC) and Glenn Brook (NICS)

Intel MIC Architecture – Intel MIC User Experiences – Part 2/2

by Tommy Minyard (TACC) and Glenn Brook (NICS)

Intel MIC Architecture – Intel Math Kernel Library on MIC

by Hans Pabst (Intel)

Intel MIC Architecture – MPI on MIC

by Glenn Brook (NICS) and Hans Pabst (Intel)

Twitter: cscsch